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ISL8483E, ISL8485E
Data Sheet August 22, 2005 FN6048.7
ESD Protected to 15kV, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
These Intersil RS-485/RS-422 devices are ESD protected, BiCMOS 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Each driver output/receiver input is protected against 15kV ESD strikes, without latch-up. Unlike competitive devices, this Intersil family is specified for 10% tolerance supplies (4.5V to 5.5V). The ISL8483E utilizes slew rate limited drivers which reduce EMI, and minimize reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications. Data rates up to 5Mbps are achievable by using the ISL8485E which features higher slew rates. Both devices present a "single unit load" to the RS-485 bus, which allows up to 32 transceivers on the network. Receiver (Rx) inputs feature a "fail-safe if open" design, which ensures a logic high Rx output, if Rx inputs are floating. Driver (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. These half duplex configurations multiplex the Rx inputs and Tx outputs to allow transceivers with Rx and Tx disable functions in 8 lead packages.
Features
* Pb-Free Plus Anneal Available (RoHS Compliant) * 125C Temperature Option * RS-485 I/O Pin ESD Protection . . . . . . . . . . . . . 15kV HBM - Class 3 ESD Level on all Other Pins . . . . . . >7kV HBM * Specified for 10% Tolerance Supplies * High Data Rate Version (ISL8485E) . . . . . . up to 5Mbps * Slew Rate Limited Version for Error Free Data Transmission (ISL8483E) . . . . . . . . . . . . . .up to 250kbps * Single Unit Load Allows up to 32 Devices on the Bus * 1nA Low Current Shutdown Mode (ISL8483E) * Low Quiescent Current: - 160A (ISL8483E) - 500A (ISL8485E) * -7V to +12V Common Mode Input Voltage Range * Three State Rx and Tx Outputs * 30ns Propagation Delays, 5ns Skew (ISL8485E) * Operate from a Single +5V Supply (10% Tolerance) * Current Limiting and Thermal Shutdown for driver Overload Protection
Applications
* Factory Automation * Security Networks * Building Environmental Control Systems * Industrial/Process Control Networks * Level Translators (e.g., RS-232 to RS-422) * RS-232 "Extension Cords"
TABLE 1. SUMMARY OF FEATURES PART NUMBER ISL8483E ISL8485E HALF/FULL NO. OF DEVICES DATA RATE DUPLEX ALLOWED ON BUS (Mbps) Half Half 32 32 0.25 5 SLEW-RATE LIMITED? Yes No RECEIVER/DRIVER QUIESCENT LOW POWER PIN ENABLE? ICC (A) SHUTDOWN? COUNT Yes Yes 160 500 Yes No 8 8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2004, 2005. All R ights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL8483E, ISL8485E Pinout Ordering Information
PART NO. (BRAND) ISL8483ECPZ (8483ECPZ) (Note) ISL8483EIB (8483EIB) ISL8483EIB-T (8483EIB) ISL8483EIBZ (8483EIBZ) (Note) TRANSMITTING INPUTS RE X X 0 1 DE 1 1 0 0 DI 1 0 X X Z 0 1 High-Z High-Z * OUTPUTS Y 1 0 High-Z High-Z * ISL8483EIBZ-T (8483EIBZ) (Note) ISL8483EIP ISL8483EIPZ (Note) ISL8485EABZ (8485EABZ) (Note) TEMP. RANGE (C) -0 to 70 -40 to 85 PACKAGE 8 Ld PDIP* (Pb-free) 8 Ld SOIC PKG. DWG. # M8.15 M8.15
ISL8483E, ISL8485E (PDIP, SOIC) TOP VIEW
RO 1 RE 2 DE 3 DI 4 D 8 7 6 5 VCC B/Z A/Y GND
R
8 Ld SOIC Tape and Reel -40 to 85 8 Ld SOIC (Pb-free) M8.15
Truth Tables
8 Ld SOIC Tape and Reel (Pb-free) -40 to 85 -40 to 85 -40 to 125 8 Ld PDIP 8 Ld PDIP* (Pb-free) 8 Ld SOIC (Pb-free) E8.3 E8.3 M8.15
ISL8485EABZ-T 8 Ld SOIC Tape and Reel (Pb-free) (8485EABZ) (Note) ISL8485ECB (8485ECB) ISL8485ECB-T (8485ECB) ISL8485ECBZ (8485ECBZ) (Note) 0 to 70 8 Ld SOIC M8.15
*Shutdown Mode for ISL8483E (see Note 7) RECEIVING INPUTS RE 0 0 0 1 1 DE 0 0 0 0 1 A-B +0.2V -0.2V Inputs Open X X OUTPUT RO 1 0 1 High-Z* High-Z
8 Ld SOIC Tape and Reel 0 to 70 8 Ld SOIC (Pb-free) M8.15
ISL8485ECBZ-T 8 Ld SOIC Tape and Reel (Pb-free) (8485ECBZ) (Note) ISL8485ECP ISL8485ECPZ (Note) ISL8485EIB (8485EIB) ISL8485EIB-T (8485EIB) ISL8485EIBZ (8485EIBZ) (Note) ISL8485EIBZ-T (8485EIBZ) (Note) ISL8485EIP ISL8485EIPZ (Note) 0 to 70 0 to 70 -40 to 85 8 Ld PDIP 8 Ld PDIP* (Pb-free) 8 Ld SOIC E8.3 E8.3 M8.15
*Shutdown Mode for ISL8483E (see Note 7)
8 Ld SOIC Tape and Reel -40 to 85 8 Ld SOIC (Pb-free) M8.15
8 Ld SOIC Tape and Reel (Pb-free) -40 to 85 -40 to 85 8 Ld PDIP 8 Ld PDIP* (Pb-free) E8.3 E8.3
*Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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ISL8483E, ISL8485E Pin Descriptions
PIN RO RE DE DI GND A/Y B/Z VCC FUNCTION Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating). Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. Ground connection. 15kV HBM ESD Protected, RS-485/422 level noninverting receiver input and noninverting driver output. Pin is an input (A) if DE = 0; pin is an output (Y) if DE = 1. 15kV HBM ESD Protected, RS-485/422 level inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0; pin is an output (Z) if DE = 1. System power supply input (4.5V to 5.5V).
Typical Operating Circuits
ISL8483E, ISL8485E
+5V + 0.1F 8 VCC 1 2 3 4 RO RE DE DI D GND 5 GND 5 R R B/Z A/Y 7 6 RT RT 7 6 B/Z A/Y 0.1F 8 VCC D DI DE RE RO 4 3 2 1 + +5V
3
ISL8483E, ISL8485E
Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Input / Output Voltages A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Short Circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 8 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . 140 Maximum Junction Temperature (Plastic Package) . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C (SOIC - Lead Tips Only) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
Operating Conditions
Temperature Range ISL8485ECX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C ISL848XEIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 85C ISL8485EAX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 125C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25C, (Note 2) SYMBOL TEST CONDITIONS TEMP (C) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Driver Differential VOUT (no load) Driver Differential VOUT (with load) Change in Magnitude of Driver Differential VOUT for Complementary Output States Driver Common-Mode VOUT Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States Logic Input High Voltage Logic Input Low Voltage Logic Input Current
VOD1 VOD2 VOD R = 50 (RS-422), (Figure 1) R = 27 (RS-485), (Figure 1) R = 27 or 50, (Figure 1)
Full Full Full Full
2 1.5 -
3 2.3 0.01
VCC 5 0.2
V V V V
VOC VOC
R = 27 or 50, (Figure 1) R = 27 or 50, (Figure 1)
Full Full
-
0.01
3 0.2
V V
VIH VIL IIN1 IIN1 IIN1
DE, DI, RE DE, DI, RE DE, DI, RE (ISL8483E) DI (ISL8485E) DE, RE (ISL8485E) DE = 0V, VCC = 0V or 4.5 to 5.5V -7V VCM 12V VCM = 0V IO = -4mA, VID = 200mV IO = -4mA, VID = 200mV 0.4V VO 2.4V -7V VCM 12V VIN = 12V VIN = -7V
Full Full Full Full Full Full Full Full 25 Full Full Full Full
2 -2 -2 -25 -0.2 3.5 12
70 -
0.8 2 2 25 1 -0.8 0.2 0.4 1 -
V V A A A mA mA V mV V V A k
Input Current (A, B), (Note 10)
IIN2 VTH VTH VOH VOL IOZR RIN
Receiver Differential Threshold Voltage Receiver Input Hysteresis Receiver Output High Voltage Receiver Output Low Voltage Three-State (high impedance) Receiver Output Current Receiver Input Resistance
4
ISL8483E, ISL8485E
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25C, (Note 2) (Continued) SYMBOL ICC TEST CONDITIONS ISL8485E, DI, RE = 0V or VCC ISL8483E, DI, RE = 0V or VCC Shutdown Supply Current Driver Short-Circuit Current, VO = High or Low Receiver Short-Circuit Current ISHDN IOSD1 IOSR DE = VCC DE = 0V DE = VCC DE = 0V TEMP (C) Full Full Full Full Full Full Full MIN 35 7 TYP 700 500 470 160 1 MAX 900 565 650 250 50 250 85 UNITS A A A A nA mA mA
PARAMETER No-Load Supply Current, (Note 3)
ISL8483E, DE = 0V, RE = VCC, DI = 0V or VCC DE = VCC, -7V VY or VZ 12V, (Note 4) 0V VO VCC
SWITCHING CHARACTERISTICS (ISL8485E) Driver Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time Driver Enable to Output High Driver Enable to Output Low Driver Disable from Output High Driver Disable from Output Low Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | Receiver Enable to Output High Receiver Enable to Output Low Receiver Disable from Output High Receiver Disable from Output Low Maximum Data Rate tPLH, tPHL RDIFF = 54, CL = 100pF, (Figure 2) tSKEW tR, tF tZH tZL tHZ tLZ tSKD tZH tZL tHZ tLZ fMAX RDIFF = 54, CL = 100pF, (Figure 2) RDIFF = 54, CL = 100pF, (Figure 2) CL = 100pF, SW = GND, (Figure 3) CL = 100pF, SW = VCC, (Figure 3) CL = 15pF, SW = GND, (Figure 3) CL = 15pF, SW = VCC, (Figure 3) (Figure 4) CL = 15pF, SW = GND, (Figure 5) CL = 15pF, SW = VCC, (Figure 5) CL = 15pF, SW = GND, (Figure 5) CL = 15pF, SW = VCC, (Figure 5) (Note 11) Full Full Full Full Full Full Full Full 25 Full Full Full Full Full 18 3 30 5 30 2 11 17 14 19 13 40 5 9 9 9 9 50 10 25 70 70 70 70 150 50 50 50 50 ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps
tPLH, tPHL (Figure 4)
SWITCHING CHARACTERISTICS (ISL8483E) Driver Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time Driver Enable to Output High Driver Enable to Output Low Driver Disable from Output High Driver Disable from Output Low Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | Receiver Enable to Output High Receiver Enable to Output Low Receiver Disable from Output High Receiver Disable from Output Low Maximum Data Rate Time to Shutdown Driver Enable from Shutdown to Output High tPLH, tPHL RDIFF = 54, CL = 100pF, (Figure 2) tSKEW tR, tF tZH tZL tHZ tLZ tSKD tZH tZL tHZ tLZ fMAX tSHDN RDIFF = 54, CL = 100pF, (Figure 2) RDIFF = 54, CL = 100pF, (Figure 2) CL = 100pF, SW = GND, (Figure 3), (Note 5) CL = 100pF, SW = VCC, (Figure 3), (Note 5) CL = 15pF, SW = GND, (Figure 3) CL = 15pF, SW = VCC, (Figure 3) (Figure 4) CL = 15pF, SW = GND, (Figure 5), (Note 6) CL = 15pF, SW = VCC, (Figure 5), (Note 6) CL = 15pF, SW = GND, (Figure 5) CL = 15pF, SW = VCC, (Figure 5) (Note 11) (Note 7) Full Full Full Full Full Full Full Full 25 Full Full Full Full Full Full Full 250 250 250 250 300 300 250 250 50 800 160 800 350 25 10 10 10 10 200 2000 800 2000 2000 2000 3000 3000 2000 50 50 50 50 600 2000 ns ns ns ns ns ns ns ns ns ns ns ns ns kbps ns ns
tPLH, tPHL (Figure 4)
tZH(SHDN) CL = 100pF, SW = GND, (Figure 3), (Notes 7, 8)
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ISL8483E, ISL8485E
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25C, (Note 2) (Continued) SYMBOL tZL(SHDN) TEST CONDITIONS CL = 100pF, SW = VCC, (Figure 3), (Notes 7, 8) TEMP (C) Full Full Full MIN TYP MAX 2000 2500 2500 UNITS ns ns ns
PARAMETER Driver Enable from Shutdown to Output Low Receiver Enable from Shutdown to Output High Receiver Enable from Shutdown to Output Low ESD PERFORMANCE RS-485 Pins (A/Y, B/Z) All Other Pins NOTES:
tZH(SHDN) CL = 15pF, SW = GND, (Figure 5), (Notes 7, 9) tZL(SHDN) CL = 15pF, SW = VCC, (Figure 5), (Notes 7, 9)
Human Body Model
25 25
-
15 >7
-
kV kV
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 3. Supply current specification is valid for loaded drivers when DE = 0V. 4. Applies to peak current. See "Typical Performance Curves" for more information. 5. When testing the ISL8483E, keep RE = 0 to prevent the device from entering SHDN. 6. When testing the ISL8483E, the RE signal high time must be short enough (typically <200ns) to prevent the device from entering SHDN. 7. The ISL8483E is put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See "Low-Power Shutdown Mode" section. 8. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 9. Set the RE signal high time >600ns to ensure that the device enters SHDN. 10. Devices meeting these limits are denoted as "single unit load (1 UL)" transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus. 11. Guaranteed by characterization, but not tested.
Test Circuits and Waveforms
VCC
DE DI Z D Y VOD
R
R
VOC
FIGURE 1. DRIVER VOD AND VOC
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ISL8483E, ISL8485E Test Circuits and Waveforms (Continued)
3V DI 1.5V 1.5V 0V tPLH CL = 100pF Z D Y SIGNAL GENERATOR RDIFF CL = 100pF OUT (Z) 50% 50% VOL tPHL tPLH VOH 50% tPHL VOH VCC DE DI OUT (Y) 50% VOL
DIFF OUT (Y - Z) tR
90% 10%
90% 10% tF
+VOD -VOD
SKEW = |tPLH (Y or Z) - tPHL (Z or Y)|
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE DI SIGNAL GENERATOR Z D Y CL DE NOTE 7 (SHDN) FOR ISL8483E ONLY 1.5V 1.5V 0V tHZ VOH - 0.5V OUT (Y, Z) 2.3V 0V tZL, tZL(SHDN) NOTE 7 OUT (Y, Z) 2.3V OUTPUT LOW VOL + 0.5V V OL tLZ VCC VOH SW 500 VCC GND 3V
PARAMETER OUTPUT tHZ tLZ tZH tZL tZH(SHDN) tZL(SHDN) Y/Z Y/Z Y/Z Y/Z Y/Z Y/Z
RE X X 0 (Note 5) 0 (Note 5) 1 (Note 8) 1 (Note 8)
DI 1/0 0/1 1/0 0/1 1/0 0/1
SW GND VCC GND VCC GND VCC
CL (pF) 15 15 100 100 100 100
tZH, tZH(SHDN) NOTE 7 OUTPUT HIGH
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
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ISL8483E, ISL8485E Test Circuits and Waveforms (Continued)
RE +1.5V B A R RO 15pF 3V A 1.5V 1.5V 0V tPLH SIGNAL GENERATOR 50% tPHL VCC RO 50% 0V
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RECEIVER PROPAGATION DELAY
RE B R SIGNAL GENERATOR A RO 1k SW 15pF RE (SHDN) FOR ISL8483E ONLY VCC GND NOTE 7 3V 1.5V 1.5V 0V
PARAMETER tHZ tLZ tZH (Note 6) tZL (Note 6) tZH(SHDN) (Note 9) tZL(SHDN) (Note 9)
DE 0 0 0 0 0 0
A +1.5V -1.5V +1.5V -1.5V +1.5V -1.5V
SW GND VCC GND VCC GND VCC
tZH, tZH(SHDN) NOTE 7 RO OUTPUT HIGH
tHZ VOH - 0.5V 1.5V 0V VOH
tZL, tZL(SHDN) NOTE 7 RO 1.5V
tLZ VCC VOL + 0.5V V OL
OUTPUT LOW
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES
Application Information
RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a pointto-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 spec requires that drivers must handle bus contention without sustaining any damage. Another important advantage of RS-485 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000', so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in the cable by external fields.
Receiver Features
These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is 200mV, as required by the RS422 and RS-485 specifications. Receiver input impedance surpasses the RS-422 spec of 4k, and meets the RS-485 "Unit Load" requirement of 12k minimum. Receiver inputs function with common mode voltages as great as 7V outside the power supplies (i.e., +12V and -7V), making them ideal for long networks where induced voltages are a realistic concern. All the receivers include a "fail-safe if open" function that guarantees a high level receiver output if the receiver inputs are unconnected (floating).
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ISL8483E, ISL8485E
Receivers easily meet the data rates supported by the corresponding driver. ISL8483E/85E receiver outputs are three-statable via the active low RE input. exceeds the RS-485 spec, even at the common mode voltage range extremes. Additionally, these devices utilize a foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short circuit condition, ISL848XE devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically reenable after the die temperature drops about 15 degrees. If the contention persists, the thermal shutdown/reenable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown.
Driver Features
The RS-485/422 driver is a differential output device that delivers at least 1.5V across a 54 load (RS-485), and at least 2V across a 100 load (RS-422). The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. Drivers of the ISL8483E/85E are three-statable via the active high DE input. The ISL8483E driver outputs are slew rate limited to minimize EMI, and to minimize reflections in unterminated or improperly terminated networks. Data rate on these slew rate limited versions is a maximum of 250kbps. Outputs of the ISL8485E driver are not limited, so faster output transition times allow data rates of at least 5Mbps.
Low Power Shutdown Mode (ISL8483E Only)
These CMOS transceivers all use a fraction of the power required by their bipolar counterparts, but the ISL8483E includes a shutdown feature that reduces the already low quiescent ICC to a 1nA trickle. The ISL8483E enters shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a period of at least 600ns. Disabling both the driver and the receiver for less than 50ns guarantees that the ISL8483E will not enter shutdown. Note that receiver and driver enable times increase when the ISL8483E enables from shutdown. Refer to Notes 5-8, at the end of the Electrical Specification table, for more information.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000', but the maximum system data rate decreases as the transmission length increases. Devices operating at 5Mbps are limited to lengths less than 100', while the 250kbps versions can operate at full data rates with lengths in excess of 1000'. Twisted pair is the cable of choice for RS-485/422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. Proper termination is imperative, when using the 5Mbps devices, to minimize reflections. Short networks using the 250kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible.
ESD Protection
All pins on these interface devices include class 3 Human Body Model (HBM) ESD protection structures, but the RS-485 pins (driver outputs and receiver inputs) incorporate advanced structures allowing them to survive ESD events in excess of 15kV HBM. The RS-485 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and without degrading the RS-485 common mode range of -7V to +12V. This built-in ESD protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present.
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers survive worst case bus contentions undamaged. The ISL848XE devices meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never
Human Body Model Testing
As the name implies, this test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge stored on a 100pF capacitor through a 1.5k current limiting resistor into the pin under test. The HBM method determines an IC's ability to withstand the ESD events typically present during handling and manufacturing. The RS-485 pin survivability on this high ESD family has been characterized to be in excess of 15kV, for discharges to GND.
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ISL8483E, ISL8485E Typical Performance Curves
90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 5 DIFFERENTIAL OUTPUT VOLTAGE (V) DRIVER OUTPUT CURRENT (mA)
VCC = 5V, TA = 25C, ISL8483E and ISL8485E; Unless Otherwise Specified
3.6 3.4 3.2 3 2.8 2.6 2.4 2.2 2 -40 RDIFF = 54 RDIFF = 100
-25
0
25
50
75
85
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (C)
FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE
160 140 120 100 OUTPUT CURRENT (mA) 80 60 40 20 0 -20 -40 -60 Y OR Z = HIGH Y OR Z = LOW
FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE
700 650 600 550 500 ICC (A) 450 400 350 300 250 200 150 -40 -25 ISL8483E, DE = GND, RE = GND 0 25 50 75 85 ISL8485E, DE = GND, RE = X, ISL8485, DE = GND, RE = X ISL8483E, DE = VCC, RE = X ISL8485E, DE = VCC, RE = X
-80 -100 -120 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 12
TEMPERATURE (oC)
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE
FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE
1200 1100 PROPAGATION DELAY (ns) 1000 900 800 700 600 500 -40 0 -40 SKEW (ns) tPHLY tPHLZ 200 tPLHY tPLHZ 300 |tPHLY - tPLHZ| |tPLHY - tPHLZ| 400
100 |CROSS PT. OF Y & Z - CROSS PT. OF Y & Z| -25 0 25 50 75 85 0 50 85
-25
25
75
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 10. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL8483E)
FIGURE 11. DRIVER SKEW vs TEMPERATURE (ISL8483E)
10
ISL8483E, ISL8485E Typical Performance Curves
40
VCC = 5V, TA = 25C, ISL8483E and ISL8485E; Unless Otherwise Specified (Continued)
3
PROPAGATION DELAY (ns)
35 tPHLY SKEW (ns) 30 tPHLZ tPLHZ tPLHY 25
2.5
|tPHLY - tPLHZ|
2
|tPLHY - tPHLZ|
1.5 |CROSSING PT. OF Y & Z - CROSSING PT. OF Y & Z|
20 -40
-25
0
25
50
75
85
1 -40
-25
0
25
50
75
85
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 12. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL8485E)
FIGURE 13. DRIVER SKEW vs TEMPERATURE (ISL8485E)
DRIVER INPUT (V)
RECEIVER OUTPUT (V)
RECEIVER OUTPUT (V)
RDIFF = 54, CL = 100pF DI
RDIFF = 54, CL = 100pF DI
5 0
5 0
5 0
5 0 RO
RO
DRIVER OUTPUT (V)
3 2 1 0
B/Z A/Y
DRIVER OUTPUT (V)
4
4 3 2 1 0 TIME (400ns / DIV) A/Y B/Z
TIME (400ns / DIV)
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL8483E)
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL8483E)
DRIVER INPUT (V)
RECEIVER OUTPUT (V)
RECEIVER OUTPUT (V)
RDIFF = 54, CL = 100pF DI
RDIFF = 54, CL = 100pF DI
5 0
5 0
5 0
RO
5 0
RO
DRIVER OUTPUT (V)
3 2 1 0
B/Z A/Y
DRIVER OUTPUT (V)
4
4 3 2 1 0 TIME (10ns / DIV) A/Y B/Z
TIME (10ns / DIV)
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL8485E)
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL8485E)
11
DRIVER INPUT (V)
DRIVER INPUT (V)
ISL8483E, ISL8485E Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 518 PROCESS: Si Gate CMOS
12
ISL8483E, ISL8485E Dual-In-Line Plastic Packages (PDIP)
N INDEX AREA E1 12 3 N/2 -B-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 -CA2 L A C L E
E8.3 (JEDEC MS-001-BA ISSUE D)
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B B1 C D D1 E E1 e eA eB L N MIN 0.015 0.115 0.014 0.045 0.008 0.355 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.400 0.325 0.280 MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 9.01 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 10.16 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
e
A1
eA eC
C
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
0.100 BSC 0.300 BSC 0.115 8 0.430 0.150 -
2.54 BSC 7.62 BSC 10.92 3.81 8
2.93
13
ISL8483E, ISL8485E Small Outline Plastic Packages (SOIC)
N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8 Rev. 1 6/05
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574
A1 B C D E
A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0 8 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
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